NASA’s Jet Propulsion Laboratory has selected Microchip Technology Inc. to design and develop a new High-Performance Spaceflight Computing (HPSC) processor for future lunar and planetary exploration missions.
Microchip is being awarded a $50 million firm-fixed-price contract to “architect, design, and deliver(Opens in a new window)” the new processor over the next three years. The goal is to produce a chip with 100x the computational capacity of the spaceflight computers NASA relies on today, while at the same time offering big improvements in reliability and fault tolerance.
As Wesley Powell, NASA’s principal technologist for advanced avionics, points out, “Our current spaceflight computers were developed almost 30 years ago.” The existing technology was also designed to “address the most computationally-intensive part of a mission,” which led to inefficiencies through overdesign. For example, power efficiency can be greatly improved using a modern processor design that can turn off certain functionality when not in use.
“We are pleased that NASA selected Microchip as its partner to develop the next-generation space-qualified compute processor platform.” said Babak Samimi, corporate vice president for Microchip’s Communications business unit. “We are making a joint investment with NASA on a new trusted and transformative compute platform. It will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption.”
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NASA believes the new processor will have a broad range of uses including Earth science operations, Mars exploration, and commercial systems on Earth that require “mission critical edge computing.” Industrial automation, edge computing, time-sensitive Ethernet data transmission, and artificial intelligence are all cited as benefiting from the chip Microchip develops.
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